/*======================*/
/* SIO0			*/
/*======================*/
#define REG_SIO0_SSPCR0			(0x000 + REG_SIO0_BASE)
#define REG_SIO0_SSPCR1			(0x004 + REG_SIO0_BASE)
#define REG_SIO0_SSPDR			(0x008 + REG_SIO0_BASE)
#define REG_SIO0_SSPSR			(0x00C + REG_SIO0_BASE)
#define REG_SIO0_SSPCPSR		(0x010 + REG_SIO0_BASE)
#define REG_SIO0_SSPIMSC		(0x014 + REG_SIO0_BASE)
#define REG_SIO0_SSPRIS			(0x018 + REG_SIO0_BASE)
#define REG_SIO0_SSPMIS			(0x01C + REG_SIO0_BASE)
#define REG_SIO0_SSPICR			(0x020 + REG_SIO0_BASE)
#define REG_SIO0_SSPDMACR		(0x024 + REG_SIO0_BASE)

#define REG_SIO0_MSKSSPFSSOUT		(0xFD0 + REG_SIO0_BASE)

#define REG_SIO0_SSPPeriphID0		(0xFEO + REG_SIO0_BASE)
#define REG_SIO0_SSPPeriphID1		(0xFE4 + REG_SIO0_BASE)
#define REG_SIO0_SSPPeriphID2		(0xFE8 + REG_SIO0_BASE)
#define REG_SIO0_SSPPeriphID3		(0xFEC + REG_SIO0_BASE)
#define REG_SIO0_SSPPCellID0		(0xFF0 + REG_SIO0_BASE)
#define REG_SIO0_SSPPCellID1		(0xFF4 + REG_SIO0_BASE)
#define REG_SIO0_SSPPCellID2		(0xFF8 + REG_SIO0_BASE)
#define REG_SIO0_SSPPCellID3		(0xFFC + REG_SIO0_BASE)

#define SIO_SSPSR_BSY                   (1 << 4)
#define SIO_SSPSR_REF                   (1 << 3)
#define SIO_SSPSR_RNE                   (1 << 2)
#define SIO_SSPSR_TNF                   (1 << 1)
#define SIO_SSPSR_TFE                   (1 << 0)
